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FPGA-Centric Design Process for Avionic Simulation and Test

Abstract : Real-time computing systems are increasingly used in aerospace and avionic industries. In the face of power challenge, performance requirements and demands for higher flexibility, hardware designers are directed toward reconfigurable computing using field programmable gate arrays (FPGAs) that offer high computation rates per watt and adaptability to the application constraints. However, considering reconfigurable computing in the avionic design process leads to several challenges for system developers. Indeed, such technology should be validated along the verification & validation cycle starting with simulation tools, passing through the test benches and finishing with the integration phase. For each step, the FPGA can play an essential role to achieve better performances, more adaptive systems, and cost-effective solutions. In this paper, we present a seamless FPGA-centric design process for avionic equipments. Along this process, we redefine the role of the FPGA circuits to cover the simulation, the test, and the integration steps. First, reconfigurable logics are used in the frame of heterogeneous CPU/FPGA computing in order to obtain high speed-up for real-time avionic simulation. The proposed environment supports dynamic execution model enabling reconfiguration during runtime to avoid the timing constraint violation. Second, the FPGA is used as a key solution to offer versatile test benches and to converge toward unified test and simulation tools. We have designed several commercial input output intellectual property systems with dynamic runtime reconfiguration capabilities, in order to mitigate component obsolescence and to provide increased flexibility and decreased design time. Third, at the integration phase, we use the conventional tools to make profit from reconfigurable technology in embedded avionic applications in order to deliver high computation rates and to adapt their functioning mode to provide reliability, fault tolerance, deterministic timing gu...
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Submitted on : Monday, October 25, 2021 - 10:59:03 AM
Last modification on : Wednesday, November 3, 2021 - 5:24:24 AM

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Rabie Ben Atitallah, Venkatasubramanian Viswanathan, Nicolas Belanger, Jean-Luc Dekeyser. FPGA-Centric Design Process for Avionic Simulation and Test. IEEE Transactions on Aerospace and Electronic Systems, Institute of Electrical and Electronics Engineers, 2018, 54 (3), pp.1047-1065. ⟨10.1109/TAES.2017.2733858⟩. ⟨hal-03400877⟩

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