High performance short-block binary regular LDPC codes

Latifa Mostari (1) , Abdelmalik Taleb-Ahmed (2)

1 Université Hassiba Benbouali of Chlef
2 LAMIH - Laboratoire d'Automatique, de Mécanique et d'Informatique industrielles et Humaines - UMR 8201

LDPC code shows a good performance with long-block codes. However, certain channels are constrained to use short-block codes due to latency. Therefore, concatenated LDPC codes with iterative decoding is a good choice to get a good performance. Concatenated binary LDPC codes were introduced as a class of concatenated codes in which the LDPC codes are irregular codes having different parameters. Although irregular LDPC codes are more efficient than regular codes, irregular LDPC codes have an error floor and a higher encoding complexity than regular code. In this paper, in order to get a good performance/complexity trade-off with a short-block code, we investigate a parallel concatenation of two identical regular binary LDPC codes, using an interleaver. Simulation results show that the proposed code outperforms a single LDPC code. The proposed code needs less time decoding delay than a single LDPC code with the same iteration number. Also, the proposed code needs a less number of iterations to achieve the same performance of a single LDPC code that leads to less decoding complexity and decoding delay. A simplified algorithm, the min-sum algorithm, that is used to decode the component codes shows a small performance loss with respect to the sum-product algorithm.

Mots clés: LDPC code; Parallel concatenation; Iterative decoding; Sum-product algorithm; Min-sum algorithm

Domaines: Automatique / Robotique

Latifa Mostari, Abdelmalik Taleb-Ahmed. High performance short-block binary regular LDPC codes. Alexandria Engineering Journal, 2018, 57 (4), pp.2633-2639. ⟨10.1016/j.aej.2017.09.016⟩. ⟨hal-03428160⟩