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A survey of cross-layer power-reliability tradeoffs in multi and many core systems-on-chip

Abstract : As systems-on-chip increase in complexity, the underlying technology presents us with significant challenges due to increased power consumption as well as decreased reliability. Today, designers must consider building systems that achieve the requisite functionality and performance using components that may be unreliable. In order to do so, it is crucial to understand the close interplay between the different layers of a system: technology, platform, and application. This will enable the most general tradeoff exploration, reaping the most benefits in power, performance and reliability. This paper surveys various cross layer techniques and approaches for power, performance, and reliability tradeoffs are technology, circuit, architecture and application layers.
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Submitted on : Tuesday, December 7, 2021 - 4:54:48 PM
Last modification on : Friday, August 26, 2022 - 2:54:44 PM

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Ahmed Eltawil, Michael Engel, Bibiche Geuskens, Amin Khajeh Djahromi, Fadi Kurdahi, et al.. A survey of cross-layer power-reliability tradeoffs in multi and many core systems-on-chip. Microprocessors and Microsystems: Embedded Hardware Design , Elsevier, 2013, Embedded Hardware Design, 37 (8), pp.760-771. ⟨10.1016/j.micpro.2013.07.008⟩. ⟨hal-03469465⟩



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